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Internship 2018 New excecution Platforms for On-Board software (m/f).

Publish Date
12 Oct 2017
Division
Airbus Defence and Space
Location
Toulouse FRA
Reference Code
10379017 BT EN EXT 1
Interest Group
Student
Functional Area
Structure Design & Integration
Contract Type
Internship
Working Time
Full time
Work Experience
No work experience

Internship 2018 New excecution Platforms for On-Board software (m/f).

Airbus Defence & Space Toulouse

Airbus is a global leader in aeronautics, space and related services. In 2016, it generated revenues of € 67 billion and employed a workforce of around 134,000. Airbus offers the most comprehensive range of passenger airliners from 100 to more than 600 seats. Airbus is also a European leader providing tanker, combat, transport and mission aircraft, as well as Europe’s number one space enterprise and the world’s second largest space business. In helicopters, Airbus provides the most efficient civil and military rotorcraft solutions worldwide.

Our people work with passion and determination to make the world a more connected, safer and smarter place. Taking pride in our work, we draw on each other's expertise and experience to achieve excellence. Our diversity and teamwork culture propel us to accomplish the extraordinary - on the ground, in the sky and in space.

Description of the job

As a European satellite prime contractor, Airbus Defence and Space is in charge of defining the on-board data processing and data handling architecture of European spacecraft. Typically, two different kinds of on-board computers are used in spacecraft: the platform computers and the payload computers. The platform computers are in charge of executing the central flight software which controls the spacecraft power distribution, implements navigation and guidance algorithms and monitors the spacecraft health. The payload computers are in charge of controlling the payloads, and also pre-processing acquired payload data before its transmission to the ground.
For both these types of on-board computers, we foresee that next generation space missions will require more capable computers, with respect to what we can implement today using proven technologies and chips like the LEON processor; that in order to implement either advanced navigation and control algorithms needed to increase the spacecraft autonomy and agility, or on the payload side with complex scientific payload data pre-processing algorithms and increased robotics for in-orbit operation and space exploration, and more generally with artificial intelligence.
Two tracks are identified for reducing the currently increasing performance gap between ground and space computing solutions offering high performance with on-board reprogrammability:

  • to improve the processing architecture design in parallel of developing new rad-hard technologies thus achieving higher running frequencies with more capable processing devices: The GR740, 4 cores Leon designed by Cobham Gaisler and implemented on 65nm technology by from ST Microelectronics is one example of such devices resulting from the ESA development roadmap on the Next Generation Microprocessor (NGMP)
  • to enable the use of commercial off the shelves System On Chip embedding programmable logic and high performance processors,(COTS) both as FPGA and micro-processors in the space environment, together with an appropriate level of radiation mitigation technique.

Within Data Processing & Onboard Software department, engineers belonging to the R&D pole and involved in the TANIA R&D project (Technology Assessment for New Instruments & Avionics Data Processing) share a common objective to establish the definition and the evaluation of key technologies to be selected as enablers for such new future disruptive execution platforms supporting payloads and/or avionics needs. This project covers a wide range of technical and system challenges amongst which the evaluation and characterization of digital cores, such as ARM or SPARC LEON used in mono or more likely in multicore configurations, the study of appropriate supervision software solutions supporting integration, modularity and potentially mixed criticality (Time And Space Partitioning, IMA, hypervisors, software parallelization APIs) as well as the associated communication means offering both high end performance and guarantees for quality of services.

The trainee will join the R&D pole to tackle one of the following topics:
A. High Performance Parallel Processing project focused on the demonstration of the benefits of using one of the most well-known parallel programming models (OpenMP) for the development of parallel space applications, in terms of performance, programmability and portability – [This topic shall be confirmed because it depends on budgets still not open at the time of redaction]
B. Ethernet based network demonstrator inspired from concepts developed and deployed in the civil aircraft domains, composed of terminal end system nodes connected to one or several switches.
This 6 Month internship will start from January 2018 (Date subject to some flexibility).

Internships at Airbus

Tasks & accountabilities

A. The baseline for the study is a parallelization exercise and evaluation which will be performed with a use case typical of an “High Performance Processing” use case which is currently not defined but could come from scientific use case (such as GAIA VPU on which already references are available) or for instance a High resolution image processing algorithm studied with CNES for a High Resolution Geostationary Observation use case (HR-GEO). The mission will consist in the actual implementation of the use cases application software on top of an OpenMP environment on two hardware targets (multicore and manycore). Functional and performance evaluation tests to measure performance key parameters both in term of technical efficiency (i.e. the capability to use the device’s resources efficiently) and industrial efficiency (mastering and lowering the programmer’s efforts for software development and verification)

B. The Ethernet based network demonstrator tasks implies the study of the following building blocks:
- Assessment of the TTTech product lines (terminal nodes and switches) compliance vs the current internal forseen specification of such an Ethernet based communication network. This assessment will consist in the development of a test suite (software and configuration setup) driving on a TTTech end system implemented in hardware in a Xilinx Zynq-7000 target, and connected to a TTTech lab switch.
- Completion of an already started study consisting in the finalization of a full software Ethernet for Space network stack inspired from A664 on an ARM Zynq-7000 platform, study and workaround of the existing limitation and potential port to GR740 or Xilinx UltraScale+ System on Chips.

Required skills

  • Master in Computer Science / Real-Time Computing specializing in Software Development
  • Good global knowledge of Processor Architectures, at least one assembler language
  • Good knowledge of the C language.
  • Good knowledge of IEEE 802.3 Ethernet standard.
  • Good knowledge and experience of the native or crossover GNU compilation string (compilation/assembly, linker, debugger).
  • Notion Hypervisor / Operating Systems is a plus
  • Notion of distributed configuration management (git, mercurial) would be a plus.
  • Microsoft Office package (Word, Excel, PowerPoint).
  • Autonomy, curiosity and culture of initiative
  • Language: French/English advanced

Overview

Country
France
Location
Toulouse
Division
Airbus (Corporate Functions), Airbus (Commercial Aircraft), Airbus Defence and Space
Employees
approx. 20,000
Open positions
526
View in Job Market

Contact Data

Please apply on line for this vacancy on line at our careers site (www.jobs.airbusgroup.com) with your CV and cover letter attached.
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Airbus is committed to achieving workforce diversity and creating an inclusive working environment. We welcome all applications irrespective of social and cultural background, age, gender, disability, sexual orientation or religious belief.

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